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ITF86110DK8T
Data Sheet January 2000 File Number 4807.2
7.5A, 30V, 0.025 Ohm, Dual N-Channel, Logic Level, Power MOSFET
Features
* Ultra Low On-Resistance - rDS(ON) = 0.025, VGS = 10V - rDS(ON) = 0.034, VGS = 4.5V - rDS(ON) = 0.042, VGS = 4.0V * Gate to Source Protection Diode * Simulation Models - Temperature Compensated PSPICETM and SABER Electrical Models - Spice and SABER Thermal Impedance Models - www.intersil.com
[ /Title Packaging SO8 (JEDEC MS-012AA) (HUF7 6400S BRANDING DASH K8) /Sub5 ject (60V, 1 0.072 2 3 4 * Peak Current vs Pulse Width Curve Ohm, 4A, N* Transient Thermal Impedance Curve vs Board Mounting Area ChanSymbol nel, * Switching Time vs RGS Curves DRAIN1(8) DRAIN1(7) Logic SOURCE1(1) Ordering Information Level GATE1(2) UltraFE PART NUMBER PACKAGE BRAND DRAIN2(6) T ITF86110DK8T SO8 86110 DRAIN2(5) Power NOTE: When ordering, use the entire part number. ITF86110DK8T SOURCE2(3) MOSis available only in tape and reel. GATE2(4) FET) /Author () /KeyAbsolute Maximum Ratings TA = 25oC, Unless Otherwise Specified words ITF86110DK8T UNITS (InterDrain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS 30 V sil Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 30 V SemiGate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS 20 V conduc- Drain Current Continuous (TA= 25oC, VGS = 10V) (Figure 2) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . ID 7.5 A tor, NContinuous (TA= 25oC, VGS = 4.5V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 6.5 A ChanContinuous (TA= 100oC, VGS = 4.5V) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 2.0 A nel, Continuous (TA= 100oC, VGS = 4.0V) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 1.5 A Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM Figure 4 A Logic Power Dissipation (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 2.5 W Level Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mW/oC oC UltraFE Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 T Maximum Temperature for Soldering oC Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL 300 Power o
Package Body for 10s, See Tech brief TB370 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260 C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. TJ = 25oC to 125oC. 2. 50oC/W measured using FR-4 board with 0.14 in2 (90.3 mm2) copper pad at 1 second. 3. 228oC/W measured using FR-4 board with 0.006 in2 (3.9 mm2) copper pad at 1000 second.
CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures. PSPICE(R) is a registered trademark of MicroSim Corporation. SABER(c) is a Copyright of Analogy Inc.http://www.intersil.com or 321-727-9207 | 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 2000
1
ITF86110DK8T
Electrical Specifications
PARAMETER OFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current ON STATE SPECIFICATIONS Gate to Source Threshold Voltage Drain to Source On Resistance VGS(TH) rDS(ON) VGS = VDS, ID = 250A (Figure 10) ID = 7.5A, VGS = 10V (Figures 8, 9) ID = 2.0A, VGS = 4.5V (Figure 8) ID = 1.5A, VGS = 4.0V (Figure 8) THERMAL SPECIFICATIONS Thermal Resistance Junction to Ambient RJA Pad Area = 0.14 in2 (90.3 mm2) (Note 2) Pad Area = 0.027 in2 (17.4 mm2) (Figure 20) Pad Area = 0.006 in2 (3.87 mm2) (Figure 20) SWITCHING SPECIFICATIONS (VGS = 4.5V) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time SWITCHING SPECIFICATIONS (VGS = 10V) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time GATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge at 5V Threshold Gate Charge Gate to Source Gate Charge Gate to Drain "Miller" Charge CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance CISS COSS CRSS VDS = 25V, VGS = 0V, f = 1MHz (Figures 12) 750 200 80 pF pF pF Qg(TOT) Qg(5) Qg(TH) Qgs Qgd VGS = 0V to 10V VGS = 0V to 5V VGS = 0V to 1V VDD = 15V, ID = 6.5A, Ig(REF) = 1.0mA (Figures 13, 16, 17) 15 9 0.80 2.8 3.8 nC nC nC nC nC td(ON) tr td(OFF) tf VDD = 15V, ID = 7.5A VGS = 10V, RGS = 2.2 (Figures 15, 18, 19) 8 55 17 4 ns ns ns ns td(ON) tr td(OFF) tf VDD = 15V, ID = 2.0A VGS = 4.5V, RGS = 1.3 (Figures 14, 18, 19) 10 230 12 33 ns ns ns ns 50 191 228
oC/W oC/W oC/W
TA = 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
BVDSS IDSS IGSS
ID = 250A, VGS = 0V (Figure 11) VDS = 30V, VGS = 0V VGS = 16V
30 -
-
10 10 2.5 0.025 0.034 0.042
V A A V
1.5 -
0.020 0.026 0.031
Source to Drain Diode Specifications
PARAMETER Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge SYMBOL VSD trr QRR ISD = 6.5A ISD = 6.5A, dISD/dt = 100A/s ISD = 6.5A, dISD/dt = 100A/s TEST CONDITIONS MIN TYP 0.79 26 20 MAX UNITS V ns nC
2
ITF86110DK8T Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 150 TA , AMBIENT TEMPERATURE (oC) 0 25 50 75 100 125 150 TA, AMBIENT TEMPERATURE (oC) 8 VGS = 10V, RJA = 50oC/W
ID, DRAIN CURRENT (A)
6
4
2 VGS = 4.0V, RJA = 228oC/W
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs AMBIENT TEMPERATURE
2 1 THERMAL IMPEDANCE
ZJA, NORMALIZED
0.1
DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 PDM
RJA = 228oC/W
0.01
t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA 10-1 100 101 102 103
SINGLE PULSE 0.001 10-5 10-4 10-3 10-2
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
1000
RJA = 228oC/W
TA = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: I = I25 150 - TA 125
IDM, PEAK CURRENT (A)
100
VGS = 10V VGS = 4.5V
10 TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 1 10-5 10-4 10-3 10-2 10-1 t, PULSE WIDTH (s) 100 101 102 103
FIGURE 4. PEAK CURRENT CAPABILITY
3
ITF86110DK8T Typical Performance Curves
200 100 ID, DRAIN CURRENT (A)
(Continued)
SINGLE PULSE TJ = MAX RATED TA = 25oC ID, DRAIN CURRENT (A)
25 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDD = 15V
20
100s 10 1ms
15
10 TJ = 150oC 5 TJ = 25oC TJ = -55oC
OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1 0.5 1 RJA = 228oC/W
10ms 0
10 VDS, DRAIN TO SOURCE VOLTAGE (V)
100
2.0
2.5 3.0 3.5 VGS, GATE TO SOURCE VOLTAGE (V)
4.0
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. TRANSFER CHARACTERISTICS
25 rDS(ON), DRAIN TO SOURCE ON RESISTANCE (m) VGS = 10V VGS = 5V VGS = 4.5V TA = 25oC PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 3.5V VGS = 4V
50 ID = 7.5A
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
20
40 ID = 1A 30
15
10
5 VGS = 3V 0 0 0.2 0.4 0.6 0.8 1.0 1.2 VDS, DRAIN TO SOURCE VOLTAGE (V) 1.4
20
10
2
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
1.8 NORMALIZED DRAIN TO SOURCE ON RESISTANCE
1.2 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 7.5A NORMALIZED GATE THRESHOLD VOLTAGE VGS = VDS, ID = 250A
1.5
1.0
1.2
0.8
0.9
0.6 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC)
0.6 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE
4
ITF86110DK8T Typical Performance Curves
1.10 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A 1000 C, CAPACITANCE (pF) 1.05 CISS = CGS + CGD
(Continued)
2000
COSS CDS + CGD
1.00
0.95
CRSS = CGD 100 VGS = 0V, f = 1MHz
0.90 -80 -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC)
50 0.1
1.0
10
30
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10 VGS , GATE TO SOURCE VOLTAGE (V)
VDD = 15V
500 VGS = 4.5V, VDD = 15V, ID = 2.0A tr SWITCHING TIME (ns) 400
8
6
300
4 WAVEFORMS IN DESCENDING ORDER: ID = 6.5A ID = 1A 0 4 8 Qg, GATE CHARGE (nC) 12 16
200 td(ON) td(OFF) 100 tf
2
0
0 0 10 20 30 40 50 RGS, GATE TO SOURCE RESISTANCE ()
NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT FIGURE 14. SWITCHING TIME vs GATE RESISTANCE
120 VGS = 10V, VDD = 15V, ID = 7.5A td(OFF)
SWITCHING TIME (ns)
90
tr 60 tf 30 td(ON) 0 0 10 20 30 40 50 RGS, GATE TO SOURCE RESISTANCE ()
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
5
ITF86110DK8T Test Circuits and Waveforms
VDS RL VDD VDS VGS = 10V VGS
+
Qg(TOT)
VDD DUT Ig(REF) VGS = 1V 0 Qg(TH) Qgs Ig(REF) 0 VGS
Qg(5) VGS = 5V
Qgd
FIGURE 16. GATE CHARGE TEST CIRCUIT
FIGURE 17. GATE CHARGE WAVEFORMS
tON RL VDS VGS VGS
+
tOFF td(OFF) tr tf 90%
td(ON) VDS
90%
0V RGS DUT 90% VGS 0 10% 50% PULSE WIDTH 50% 0 10% 10%
FIGURE 18. SWITCHING TIME TEST CIRCUIT
FIGURE 19. SWITCHING TIME WAVEFORM
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ITF86110DK8T Thermal Resistance vs. Mounting Pad Area
The maximum rated junction temperature, TJM, and the thermal resistance of the heat dissipating path determines the maximum allowable device power dissipation, PDM, in an application. Therefore the application's ambient temperature, TA (oC), and thermal resistance RJA (oC/W) must be reviewed to ensure that TJM is never exceeded. Equation 1 mathematically represents the relationship and serves as the basis for establishing the rating of the part.
( T JM - T A ) P DM = -----------------------------R JA 300 RJA = 103.2 - 24.3 250
* ln(AREA)
228 oC/W - 0.006in2 191 oC/W - 0.027in2
R, RJA (oC/W)
200 150 100 50
(EQ. 1)
R = 46.4 - 21.7 * ln(AREA)
0 0.001 0.01 0.1 1 AREA, TOP COPPER AREA (in2) PER DIE
In using surface mount devices such as the SO8 package, the environment in which it is applied will have a significant influence on the part's current and maximum power dissipation ratings. Precise determination of PDM is complex and influenced by many factors: 1. Mounting pad area onto which the device is attached and whether there is copper on one side or both sides of the board. 2. The number of copper layers and the thickness of the board. 3. The use of external heat sinks. 4. The use of thermal vias. 5. Air flow and board orientation. 6. For non steady state applications, the pulse width, the duty cycle and the transient thermal response of the part, the board and the environment they are in. Intersil provides thermal information to assist the designer's preliminary application evaluation. Figure 20 defines the RJA for the device as a function of the top copper (component side) area. This is for a horizontally positioned FR-4 board with 1oz copper after 1000 seconds of steady state power with no air flow. This graph provides the necessary information for calculation of the steady state junction temperature or power dissipation. Pulse applications can be evaluated using the Intersil device Spice thermal model or manually utilizing the normalized maximum transient thermal impedance curve. Displayed on the curve are RJA values listed in the Electrical Specifications table. The points were chosen to depict the compromise between the copper board area, the thermal resistance and ultimately the power dissipation, PDM. Thermal resistances corresponding to other copper areas can be obtained from Figure 20 or by calculation using Equation 2. RJA is defined as the natural log of the area times a coefficient added to a constant. The area, in square inches is the top copper area including the gate and source pads.
R JA = 103.2 - 24.3 x
FIGURE 20. THERMAL RESISTANCE vs MOUNTING PAD AREA
While Equation 2 describes the thermal resistance of a single die, several devices are offered with two die in the SO8 package. The dual die SO8 package introduces an additional thermal component, thermal coupling resistance, R. Equation 3 describes R as a function of the top copper mounting pad area.
R
= 46.4 - 21.7 x
ln ( Area )
(EQ. 3)
The thermal coupling resistance vs. copper area is also graphically depicted in Figure 20. It is important to note the thermal resistance (RJA) and thermal coupling resistance (R) are equivalent for both die. For example at 0.1 square inches of copper: RJA1 = RJA2 = 159C/W
R1 = R2 = 97C/W
TJ1 and TJ2 define the junction temperature of the respective die. Similarly, P1 and P2 define the power dissipated in each die. The steady state junction temperature can be calculated using Equation 4 for die 1 and Equation 5 for die 2. Example: To calculate the junction temperature of each die when die 2 is dissipating 0.5 Watts and die 1 is dissipating 0 Watts. The ambient temperature is 70C and the package is mounted to a top copper area of 0.1 square inches per die. Use Equation 4 to calculate TJ1 and Equation 5 to calculate TJ2.
.
T J1 = P 1 R JA + P 2 R + T A
(EQ. 4)
TJ1 = (0 Watts)(159C/W) + (0.5 Watts)(97C/W) + 70C TJ1 = 119C
T J2 = P 2 R JA + P 1 R + T A (EQ. 5)
ln ( Area )
(EQ. 2)
TJ2 = (0.5 Watts)(159C/W) + (0 Watts)(97C/W) + 70C TJ2 = 150C
7
ITF86110DK8T
The transient thermal impedance (ZJA) is also affected by varied top copper board area. Figure 21 shows the effect of copper pad area on single pulse transient thermal impedance. Each trace represents a copper pad area in square inches corresponding to the descending list in the graph. Spice and SABER thermal models are provided for each of the listed pad areas. Copper pad area has no perceivable effect on transient thermal impedance for pulse widths less than 100ms. For pulse widths less than 100ms the transient thermal impedance is determined by the die and package. Therefore, CTHERM1 through CTHERM5 and RTHERM1 through RTHERM5 remain constant for each of the thermal models. A listing of the model component values is available in Table 1.
160
IMPEDANCE (oC/W)
ZJA, THERMAL
120
COPPER BOARD AREA - DESCENDING ORDER 0.020 in2 0.140 in2 0.257 in2 0.380 in2 0.493 in2
80
40
0 10-1 100 101 t, RECTANGULAR PULSE DURATION (s) 102 103
FIGURE 21. THERMAL RESISTANCE vs MOUNTING PAD AREA
8
ITF86110DK8T PSPICE Electrical Model
.SUBCKT ITF86110DK8T 2 1 3 ;
CA 12 8 6.4e-10 CB 15 14 6.48e-10 CIN 6 8 6.95e-10
LDRAIN
REV 9 Dec 1999
DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DESD1 91 9 DESD1MOD DESD2 91 7 DESD2MOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 7 17 18 37.6 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1
LGATE
DPLCAP 10 RSLC2
5 DBREAK RLDRAIN
DRAIN 2 RSLC1 51 ESLC 50 EBREAK
5 51
ESG + GATE 1 RLGATE DESD1 91 DESD2 CIN EVTEMP 9 RGATE + 18 22 20 6 8 EVTHRES + 19 8 6
IT 8 17 1 LDRAIN 2 5 1.0e-9 LGATE 1 9 1.04e-9 LSOURCE 3 7 1.29e-10 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD
MSTRO LSOURCE 8 RSOURCE RLSOURCE 7 SOURCE 3
RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 1.4e-3 RGATE 9 20 2.83 RLDRAIN 2 5 10 RLGATE 1 9 9 10.4 RLSOURCE 3 7 1.29 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 14.0e-3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A S1B S2A S2B 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD
S1A 12 S1B CA 13 + EGS 6 8 13 8
S2A 14 13 S2B CB + EDS 5 8 14 IT 15 17
-
-
VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*175),2))} .MODEL DBODYMOD D (IS = 9.7e-13 RS = 8.5e-3 TRS1 = 2.5e-3 TRS2 = -2.9e-6 IKF= 3.0 XTI = 3.5 CJO = 5.6e-10 TT = 9.1e-9 VJ = 0.65 M = 0.44) .MODEL DBREAKMOD D (RS = 2.3e-1 TRS1 = 4.0e-3 TRS2 = -6.0e-6) .MODEL DESD1MOD D (BV = 11.24 Tbv1= -2.5e-3 N= 19 RS = 280) .MODEL DESD2MOD D (BV = 11.24 Tbv1= -2.5e-3 N= 19 RS = 280) .MODEL DPLCAPMOD D (CJO = 5.0e-10 IS = 1e-30 VJ = 0.34 M = 0.44) .MODEL MMEDMOD NMOS (VTO = 2.52 KP = 24 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 2.83 RS = 0.075) .MODEL MSTROMOD NMOS (VTO = 3.04 KP = 66 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u LAMBDA = 0.045) .MODEL MWEAKMOD NMOS (VTO = 2.01 KP = 0.09 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 28.3 RS = 0.1) .MODEL RBREAKMOD RES (TC1 = 7.95e-4 TC2 = -1.55e-6) .MODEL RDRAINMOD RES (TC1 = 3.78e-2 TC2 = 4.99e-5) .MODEL RSLCMOD RES (TC1 = 4.07e-3 TC2 = 2.25e-5) .MODEL RSOURCEMOD RES (TC1 = 1.00e-3 TC2 = 0) .MODEL RVTHRESMOD RES (TC1 = -3.5e-3 TC2 = -7.8e-6) .MODEL RVTEMPMOD RES (TC1 = -8.0e-4 TC2 = 1.0e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 .MODEL S1BMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .MODEL S2BMOD VSWITCH (RON = 1e-5 .ENDS ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 VON = -6.2 VOFF= -3.1) VON = -3.1 VOFF= -6.2) VON = -1.0 VOFF= 0.5) VON = 0.5 VOFF= -1.0)
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
9
+
11 + 17 18
-
RDRAIN 16 21
DBODY
MWEAK
MMED
RBREAK 18 RVTEMP 19
VBAT +
8 22 RVTHRES
ITF86110DK8T SABER Electrical Model
REV 9 Dec 1999 template ITF86110DK8T n2,n1,n3 electrical n2,n1,n3 { var i iscl dp..model dbodymod = (isl = 9.7e-13, rs = 8.5e-3, trs1 = 2.5e-3, trs2 = -2.9e-6, ikf = 3.0, xti = 3.5, cjo = 5.6e-10, tt = 9.1e-9, vj = 0.65, m = 0.44) dp..model dbreakmod = (rs = 2.3e-1, trs1 = 4.0e-3, trs2 = -6.0e-6) dp..model desd1mod = (bv=11.24, tbv1 = -2.5e-3, nl=19, rs=280) dp..model desd2mod = (bv=11.24, tbv1 = -2.5e-3, nl=19, rs=280) dp..model dplcapmod = (cjo = 5.0e-10, isl = 1e-29, vj = 0.34, m = 0.44) m..model mmedmod = (type=_n, vto = 2.52, kp = 24, is = 1e-30, tox = 1, rs = 7.5e-2) m..model mstrongmod = (type=_n, vto = 3.04, kp = 66, is = 1e-30, tox = 1, lambda = 4.5e-2) LDRAIN m..model mweakmod = (type=_n, vto = 2.01, kp = 0.09, is = 1e-30, tox = 1) DPLCAP 5 sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -6.2, voff = -3.1) sw_vcsp..model s1bmod = (ron = 1e-5, roff = 0.1, von = -3.1, voff = -6.2) 10 RLDRAIN sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -1.0, voff = 0.5) RSLC1 sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0.5, voff = -1.0)
51
DRAIN 2
c.ca n12 n8 = 6.48e-10 c.cb n15 n14 = 6.48e-10 c.cin n6 n8 = 6.95e-10
RSLC2 ISCL
dp.dbody n7 n5 = model=dbodymod dp.dbreak n5 n11 = model=dbreakmod dp.desd1 n91 n9 = model=desd1mod dp.desd2 n91 n7 = model=desd2mod dp.dplcap n10 n5 = model=dplcapmod i.it n8 n17 = 1 l.ldrain n2 n5 = 1.0e-9 l.lgate n1 n9 = 1.04e-9 l.lsource n3 n7 = 1.29e-10
ESG + GATE 1 EVTEMP RGATE + 18 22 9 20 RLGATE DESD1 91 DESD2 LGATE 6 6 8 EVTHRES + 19 8
50 RDRAIN 21 16
DBREAK 11 DBODY MWEAK MMED EBREAK + 17 18
MSTRO CIN 8
-
LSOURCE 7 RLSOURCE
SOURCE 3
RSOURCE S1A 12 13 8 S1B CA 13 + EGS 6 8 EDS S2A 14 13 S2B CB + 5 8 14 IT 15 17 RBREAK 18 RVTEMP 19
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u res.rbreak n17 n18 = 1, tc1 = 7.95e-4, tc2 = -1.55e-6 res.rdrain n50 n16 = 1.4e-3, tc1 = 3.78e-2, tc2 = 4.99e-5 res.rgate n9 n20 = 2.83 res.rldrain n2 n5 = 10 res.rlgate n1 n9 = 10.4 res.rlsource n3 n7 = 1.29 res.rslc1 n5 n51 = 1e-6, tc1 = 4.07e-3, tc2 = 2.25e-5 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 14.0e-3, tc1 = 1.00e-3, tc2 = 0 res.rvtemp n18 n19 = 1, tc1 = -8.0e-4, tc2 = 1.0e-6 res.rvthres n22 n8 = 1, tc1 = -3.5e-3, tc2 = -7.8e-6 spe.ebreak n11 n7 n17 n18 = 37.6 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1
VBAT +
-
-
8 RVTHRES
22
equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/175))**2)) } }
10
ITF86110DK8T SPICE Thermal Model
REV 7 Dec1999 ITF86110DK8T Copper Area = 0.02 in2 CTHERM1 th 8 8.5e-4 CTHERM2 8 7 1.8e-3 CTHERM3 7 6 5.0e-3 CTHERM4 6 5 1.3e-2 CTHERM5 5 4 4.0e-2 CTHERM6 4 3 9.0e-2 CTHERM7 3 2 4.0e-1 CTHERM8 2 tl 1.4 RTHERM1 th 8 3.5e-2 RTHERM2 8 7 6.0e-1 RTHERM3 7 6 2 RTHERM4 6 5 8 RTHERM5 5 4 18 RTHERM6 4 3 39 RTHERM7 3 2 42 RTHERM8 2 tl 48
th JUNCTION
RTHERM1 8
CTHERM1
RTHERM2 7
CTHERM2
RTHERM3 6
CTHERM3
RTHERM4
CTHERM4 5
SABER Thermal Model
Copper Area = 0.02 in2 template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th 8 = 8.5e-4 ctherm.ctherm2 8 7 = 1.8e-3 ctherm.ctherm3 7 6 = 5.0e-3 ctherm.ctherm4 6 5 = 1.3e-2 ctherm.ctherm5 5 4 = 4.0e-2 ctherm.ctherm6 4 3 = 9.0e-2 ctherm.ctherm7 3 2 = 4.0e-1 ctherm.ctherm8 2 tl = 1.4 rtherm.rtherm1 th 8 = 3.5e-2 rtherm.rtherm2 8 7 = 6.0e-1 rtherm.rtherm3 7 6 = 2 rtherm.rtherm4 6 5 = 8 rtherm.rtherm5 5 4 = 18 rtherm.rtherm6 4 3 = 39 rtherm.rtherm7 3 2 = 42 rtherm.rtherm8 2 tl = 48 }
RTHERM5
CTHERM5 4
RTHERM6 3
CTHERM6
RTHERM7 2
CTHERM7
RTHERM8
CTHERM8
tl
AMBIENT
TABLE 1. Thermal Models COMPONANT CTHERM6 CTHERM7 CTHERM8 RTHERM6 RTHERM7 RTHERM8 0.02 in2 9.0e-2 4.0e-1 1.4 39 42 48 0.14 in2 1.3e-1 6.0e-1 2.5 26 32 35 0.257 in2 1.5e-1 4.5e-1 2.2 20 31 38 0.38 in2 1.5e-1 6.5e-1 3 20 29 31 0.493 in2 1.5e-1 7.5e-1 3 20 23 25
11
MS-012AA
E E1 1 e 2 A
ITF86110DK8T
8 LEAD JEDEC MS-012AA SMALL OUTLINE PLASTIC PACKAGE INCHES
A1
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 5.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 6.20 4.00 NOTES 2 3 4
SYMBOL A A1 b c
MIN 0.0532 0.004 0.013 0.0075 0.189 0.2284 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.244 0.1574
D 6
D
b
E E1 e H
5
h x 45o
0.050 BSC 0.0099 0.016 0.0196 0.050
1.27 BSC 0.25 0.40 0.50 1.27
c
L
L 0.060 1.52 0o-8o
0.004 IN 0.10 mm
0.050 1.27 0.024 0.6
0.155 4.0 0.275 7.0 MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE-MOUNTED APPLICATIONS
NOTES: 1. All dimensions are within allowable dimensions of Rev. C of JEDEC MS-012AA outline dated 5-90. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.006 inches (0.15mm) per side. 3. Dimension "E1" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 0.010 inches (0.25mm) per side. 4. "L" is the length of terminal for soldering. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. Controlling dimension: Millimeter. 7. Revision 8 dated 5-99.
1.5mm DIA. HOLE
4.0mm USER DIRECTION OF FEED 2.0mm 1.75mm C L
MS-012AA
12mm TAPE AND REEL
12mm
8.0mm
40mm MIN. ACCESS HOLE 18.4mm COVER TAPE 13mm 330mm 50mm
GENERAL INFORMATION 1. 2500 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
12.4mm
12
ITF86110DK8T
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13

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